1. Field of the Invention
This invention relates generally to the field of data processing system and more particularly to the logic for stalling a memory management unit while a segment descriptor which indicates the main memory address of the segment containing the desired information is fetched.
2. Description of the Prior Art
In order for data processing systems to operate more efficiently in a multiprogram environment, the information in main memory is organized in segments. When the data processing system is required to execute a program for an additional job, the operating system must find room in main memory for the program as well as the information to be processed by the program. The operating system, therefore, will assign an area of memory for the information and, if necessary, for the program. The information stored in the area will be in the form a segment, that is, there will be a main memory address of the location of the first word of the segment and there will be a number of consecutive locations, typically 128 or 256 locations, in which the remaining words of the segment are stored. The address of a location storing a requested word is generated by adding a displacement to the address of the location of the first word.
Since the information may end up at any physical address location in main memory and the program must access the data, the program will keep a logical address of the requested location. Therefore, when the operating system assigns memory space to the information, it must provide a translation from the logical address to the physical address. The operating system will therefore generate a translation table made up of segment descriptors.
There is a segment descriptor for each segment of main memory. The segment descriptor includes the main memory physical address of the first word of the segment. The logical address is applied to the translation table to read out the appropriate segment descriptor.
In the prior art systems, if the addressed segment descriptor is not stored in the segment table, the operating system calls to a firmware routine to fetch the segment descriptor and store it in the translation table. Then, the firmware returns to the software to again address the translation table with the logical address. This time the segment descriptor is stored in the translation table and the physical address is calculated by adding the displacement to the physical address included in the segment descriptor. The length of time it takes to address the translation table for the segment descriptor, to use the firmware routine to fetch the segment descriptor and to readdress the translation table is excessive. Such a segmentation system using segment descriptors is described in U.S. Pat. No. 4,320,451 entitled, "Extended Semaphone Architecture".